LDMOS 2-stage integrated Doherty MMIC

The BLM10D2327-60ABG is a 2-stage fully integrated Doherty MMIC solution using Ampleon’s state of the art GEN10 LDMOS MMIC technology. The carrier and peaking device, input splitter and output combiner are integrated in a single package. This device is perfectly suited as general purpose driver or mMIMO final in the frequency range from 2300 MHz to 2700 MHz. Available in gull wing.

Features and benefits

  • Integrated input splitter
  • Integrated output combiner
  • High efficiency
  • High output impedance thanks to integrated pre-match
  • Designed for wideband operation (frequency 2300 MHz to 2700 MHz)
  • Integrated temperature compensation bias
  • Independent control of carrier and peaking bias
  • Integrated ESD protection
  • Source impedance 50 Ω; high power gain
  • For RoHS compliance see the product details on the Ampleon website

Applications

  • RF power MMIC for multi-carrier and multi-standard GSM, W-CDMA and LTE base stations in the 2300 MHz to 2700 MHz frequency range

Parametrics

Symbol Parameter Conditions Min Typ/Nom Max Unit
frange frequency range 2300 2700 MHz
PL(3dB) nominal output power at 3 dB gain compression 63 W
Test signal: 1-c W-CDMA 5 MHz PAR 9.9 dB
VDS drain-source voltage 2500 MHz [0] 28 V
PL(AV) average output power 2500 MHz [0] 10 W
Gp power gain 2500 MHz [0] 28.2 dB
ηD drain efficiency 2500 MHz [0] 40.8 %
PL(M) peak output power 2500 MHz [0] 48.9 dBm

Package / Packing

Type number Package Outline version Reflow-/Wave
soldering
Packing Product status Marking Orderable part number,
(Ordering code (12NC))
BLM10D2327-60ABGY OMP-400-8G-1
(OMP-400-8G-1)
omp-400-8g-1_po.pdf T&R 13" Drypack Active Standard Marking BLM10D2327-60ABGYZ
(9349 602 36535)
BLM10D2327-60ABG OMP-400-8G-1
(OMP-400-8G-1)
omp-400-8g-1_po.pdf Tray, NonBakeable, Multiple in Drypack Active Standard Marking BLM10D2327-60ABGZ
(9349 602 36517)

Pinning info

Pin Symbol Description Simplified outline Graphic symbol
1 VDS1 drain-source voltage of driver stages
2 VGS(P) gate-source voltage of peaking P
3 VGS(C) gate-source voltage of carrier C
4 RF_IN RF input
5 VGS(C) gate-source voltage of carrier C
6 VGS(P) gate-source voltage of peaking P
7 VDS1 drain-source voltage of driver stages
8 RF_OUT/VDS2 RF output / drain-source voltage of final stages
flange GND RF ground

Quality

Type number Orderable part number Chemical content RoHS / RHF Leadfree conversion date MSL MSL LF
Quality and reliability disclaimer

Design support

Title Type Date
PCB Design BLM10D2327-60ABG (Data sheet) Design support 2020-01-14