LDMOS 2-stage integrated Doherty MMIC

The BLM8AD22S-60ABG is a dual section solution using Ampleon’s state of the art GEN8 LDMOS technology. It includes a 45 W 2-stage fully integrated Doherty MMIC in section A, and a 15 W, 2-stage MMIC in section B, allowing a 3-way 1:2:1 Doherty when both sections are externally combined. The carrier and peaking devices, input splitter and output combiner, of the 2-stage fully integrated Doherty MMIC of section A are integrated in package. This device is perfectly suited as final stage in massive MIMO or small cell applications in the frequency range from 2100 MHz to 2200 MHz. Available in gull wing.

Features and benefits

  • Integrated input splitter in section A
  • Integrated output combiner in section A
  • Very high efficiency thanks to 3-way Doherty architecture
  • Designed for broadband operation (frequency 2100 MHz to 2200 MHz)
  • Integrated temperature compensated bias
  • Independent control of carrier and peaking bias
  • Integrated ESD protection
  • Excellent thermal stability
  • Source impedance 50 Ω; high power gain
  • For RoHS compliance see the product details on the Ampleon website

Applications

  • RF power MMIC for multi-carrier and multi-standard GSM, W-CDMA and LTE base stations in the 2100 MHz to 2200 MHz frequency range

Parametrics

Symbol Parameter Conditions Min Typ/Nom Max Unit
frange frequency range 2100 2200 MHz
PL(3dB) nominal output power at 3 dB gain compression 61 W
Test signal: 1-c LTE 20 MHz
VDS drain-source voltage 2140 MHz [0] 28 V
PL(AV) average output power 2140 MHz [0] 10 W
Gp power gain 2140 MHz [0] 28.2 dB
ηD drain efficiency 2140 MHz [0] 46.7 %
ACPR5M adjacent channel power ratio (5 MHz) 2140 MHz [0] -34.7 dBc

Package / Packing

Type number Package Outline version Reflow-/Wave
soldering
Packing Product status Marking Orderable part number,
(Ordering code (12NC))
BLM8AD22S-60ABG OMP-780-16G-1
(OMP-780-16G-1)
omp-780-16g-1_po.pdf Reel 13" Q1/T1 in Drypack Active Standard Marking BLM8AD22S-60ABGY
(9349 601 12518)

Pinning info

Pin Symbol Description Simplified outline Graphic symbol
1 VDS(A1) drain-source voltage of driver stages of section A
2 VGS(A_P) gate-source voltage of peaking A_P
3 VGS(A_C) gate-source voltage of carrier A_C
4 RF_IN_A RF input section A
5 n.c. not connected
6 n.c. not connected
7 n.c. not connected
8 n.c. not connected
9 n.c. not connected
10 n.c. not connected
11 RF_IN_B RF input section B
12 n.c. not connected
13 VGS(B_P) gate-source voltage of peaking B_P
14 VDS(B1) drain-source voltage of driver stages of section B
15 RF_OUT_B/VDS(B2) RF output section B / drain-source voltage of final stages of section B
16 RF_OUT_A/VDS(A2) RF output section A / drain-source voltage of final stages of section A
flange GND RF ground

Quality

Type number Orderable part number Chemical content RoHS / RHF Leadfree conversion date MSL MSL LF
BLM8AD22S-60ABG BLM8AD22S-60ABGY BLM8AD22S-60ABG 3 3
Quality and reliability disclaimer

Design support

Title Type Date
PCB Design BLM8AD22S-60ABG (Data sheet) Design support 2019-04-25